digital clock

design algorithm in VHDL
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Pistorius
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digital clock

Post by Pistorius »

if I want to program my own circuit in VHDL, for example a digital clock, how should I start? I downloaded something about VHDL, but I don't know how to program the circuit and what circuit to get.
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JPLRMD
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Re: digital clock

Post by JPLRMD »

programming a digital clock into a CPLD or FPGA is a good way to get started with CPLD and FPGA circuits. At the very beginning, it is necessary to say that knowledge of classic digital circuits is absolutely necessary. So, you need to clarify whether you know how a counter from JK flip-flops works, what is the difference between an asynchronous and a synchronous counter, how gates, shift registers, etc., etc. work.
The next step is to learn the Verilog language. I recommend starting with Verilog, rather than VHDL.
Next you will need some sort of simulator for either Verilog or VHDL or both. There are several options that are free. Verilator is a Verilog simulator primarily for Linux Ubuntu I think, but it also runs on other Linuxes. More about him herehttps://www.veripool.org/verilator/
There is also Icarus Verilog , which is an interpreter but very reliable. More about him here
https://en.wikipedia.org/wiki/Icarus_Verilog
Both mentioned, but cannot directly display graphic outputs, progress. An external imaging program must be used.
Another option is Vivado from Xilinx which can do both Verilog and VHDL and also works on MS Windows. Vivado is commercial, but there is a small version for students and beginners. It's free. The disadvantage of Vivada is its huge size, over 10 GByte. :D There is also an online simulation on the EDA Playground, which is available here:https://www.edaplayground.com/

When you manage to build a description of digital clocks in Verilog (which are chained counters with parallel outputs) you will need to synthesize it into some CPLD or FPGA circuit. That will be the next step. Here I recommend Vivado from Xilinx. And finally you will need to do a simulation and if everything goes well, then just program the circuit.
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borec
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Re: digital clock

Post by borec »

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Pistorius
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Re: digital clock

Post by Pistorius »

well that's interesting. They write there that the student lessons are in Verilog. Now, how to program it into a circuit.
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electron
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Re: digital clock

Post by electron »

you still have a long way to go to program the circuit. First, you have to synthesize and simulate the description in Verilog. You have to find a circuit for which you will synthesize, assign pins to inputs and outputs. Maybe you can also supplement verilog with a multiplexed output to a 7-segment code.
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ninja
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Re: digital clock

Post by ninja »

from an economic point of view, digital clocks in FPGAs are stupid. It's not worth it. The cheapest way to make a digital clock is using some old TTL or CMOS 4000 circuits from old scrap. In the best case, with a microcomputer, when you make the program yourself and don't count the time you devote to building the program.
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Yoshi
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Re: digital clock

Post by Yoshi »

It exist vintage dedicated digital clock circuits from National Semiconductor like MM5316, MM5314 and others. Still available on eBay.
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Pistorius
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Re: digital clock

Post by Pistorius »

yoshi, how can I use the dedicated digital clock circuits to drive nixies ?
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Yoshi
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Re: digital clock

Post by Yoshi »

Either use digital circuit with non-multiplexed outputs (e.g 5316) where you need convert 7-segment code to BCD or use circuit with BCD multiplexed outputs. Demultiplex the outputs into 4-bit latches. The decoders 141 follows the latches and drives the nixie. Let me know if you need schematics.
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Pistorius
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Re: digital clock

Post by Pistorius »

yes please, give me a schematics
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